1. Field
Exemplary embodiments of the present invention relate to a differential amplifier circuit.
2. Description of the Related Art
A differential amplifier circuit is a circuit to amplify a voltage difference between two signals which are inputted in a differential manner, and is used in almost all kinds of integrated circuit chips so as to receive a signal from outside a chip or amplify an internal signal of the chip. For example, a memory may include several hundred to thousand differential amplifier circuits.
FIG. 1 is a diagram illustrating a conventional differential amplifier circuit.
Referring to FIG. 1, the differential amplifier circuit 100 serves to receive a pair of differential input signals including an input signal IN and a complementary input signal INB and amplify a voltage difference between the input signals IN and INB to output an output signal OUT and a complementary output signal OUTB. When the voltage of the input signal IN is higher than the voltage of the complementary input signal INB, the differential amplifier circuit 100 outputs the output signal OUT at a high level and outputs the complementary output signal OUTB at a low level. When the voltage of the complementary input signal INB is higher than the voltage of the input signal IN, the differential amplifier circuit 100 outputs the output signal OUT at a low level and outputs the complementary output signal OUTB at a high level. The differential amplifier circuit 100 may receive a clock CLK and perform an operation synchronized with the clock CLK or may operate in an asynchronous manner without receiving the clock CLK.
In an ideal case, the differential amplifier circuit 100 may amplify the output signal OUT to a high level and amplify the complementary output signal OUTB to a low level, even though the input signal IN is slightly higher than the complementary input signal INB. Furthermore, the differential amplifier circuit 100 may amplify the output signal OUT to a low level and amplify the complementary output signal OUTB to a high level even though the complementary input signal INB is slightly higher than the input signal IN. However, an ideal differential amplifier circuit does not exist, and the real differential amplifier circuit 100 may not perform a normal amplification operation when a voltage level difference between the input signal IN and the complementary input signal INB is not equal to or more than a predetermined offset value. For example, when the voltage level of the input signal IN is higher than the voltage level of the complementary input signal INB but the voltage level difference is insufficient, the differential amplifier circuit 100 may perform an abnormal amplification operation. For example, the differential amplifier circuit 100 may output the output signal OUT at a low level and output the complementary output signal OUTB at a high level, i.e., an opposite operation to the normal differential amplification operation.
A variety of schemes have been proposed to cancel an offset of the differential amplifier circuit. However, the schemes necessarily require a large and complex circuit. Thus, the schemes may be applied to a system having a small number of differential amplifier circuits, but may not be applied to a system having a large number of differential amplifier circuits.